Mostrar el registro sencillo del ítem

dc.contributor.author
Menéndez, Martín Nicolás  
dc.contributor.author
Larosa, Facundo Santiago  
dc.contributor.author
Ghignone, Ramiro Adrian  
dc.contributor.author
Alvarez, Nicolás  
dc.contributor.author
Lutenberg, Ariel  
dc.date.available
2022-09-12T15:21:14Z  
dc.date.issued
2020-02  
dc.identifier.citation
Menéndez, Martín Nicolás; Larosa, Facundo Santiago; Ghignone, Ramiro Adrian; Alvarez, Nicolás; Lutenberg, Ariel; FPGA implementation of a critical railway interlocking system; Institute of Electrical and Electronics Engineers; IEEE Latin America Transactions; 18; 2; 2-2020; 288-294  
dc.identifier.issn
1548-0992  
dc.identifier.uri
http://hdl.handle.net/11336/168354  
dc.description.abstract
An interlocking is a railway system that automatically controls that changes in routes are safely managed, avoidingtrain crashes and derailments. This article presents an analysis of the state of the art technology used in several commercial interlocking equipment. Based on this analysis, design and implementation of an interlocking system architecture in FPGA technology is proposed. Appropriate techniques are applied to achieve the required level of security. The scalability of the design is also analyzed and conclusions are presented.  
dc.format
application/pdf  
dc.language.iso
spa  
dc.publisher
Institute of Electrical and Electronics Engineers  
dc.relation
https://ri.conicet.gov.ar/handle/11336/164757  
dc.rights
info:eu-repo/semantics/restrictedAccess  
dc.rights.uri
https://creativecommons.org/licenses/by-nc-sa/2.5/ar/  
dc.subject
CRITICAL SYSTEMS  
dc.subject
FPGA  
dc.subject
INTERLOCKING  
dc.subject
RAILWAY  
dc.subject.classification
Ingeniería Eléctrica y Electrónica  
dc.subject.classification
Ingeniería Eléctrica, Ingeniería Electrónica e Ingeniería de la Información  
dc.subject.classification
INGENIERÍAS Y TECNOLOGÍAS  
dc.title
FPGA implementation of a critical railway interlocking system  
dc.type
info:eu-repo/semantics/article  
dc.type
info:ar-repo/semantics/artículo  
dc.type
info:eu-repo/semantics/publishedVersion  
dc.date.updated
2022-09-08T15:15:46Z  
dc.journal.volume
18  
dc.journal.number
2  
dc.journal.pagination
288-294  
dc.journal.pais
Estados Unidos  
dc.journal.ciudad
Nueva Jersey  
dc.description.fil
Fil: Menéndez, Martín Nicolás. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad de Buenos Aires. Facultad de Ingeniería. Departamento de Electronica; Argentina  
dc.description.fil
Fil: Larosa, Facundo Santiago. Universidad Tecnológica Nacional. Facultad Regional Haedo; Argentina  
dc.description.fil
Fil: Ghignone, Ramiro Adrian. Universidad Tecnológica Nacional. Facultad Regional Haedo; Argentina  
dc.description.fil
Fil: Alvarez, Nicolás. Universidad de Buenos Aires. Facultad de Ingeniería. Departamento de Electronica; Argentina. Universidad Nacional de San Martín; Argentina  
dc.description.fil
Fil: Lutenberg, Ariel. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina. Universidad de Buenos Aires. Facultad de Ingeniería. Departamento de Electronica; Argentina  
dc.journal.title
IEEE Latin America Transactions  
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/url/https://ieeexplore.ieee.org/document/9085282/  
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/doi/http://dx.doi.org/10.1109/TLA.2020.9085282