Artículo

FPGA implementation of a critical railway interlocking system

Menéndez, Martín NicolásIcon ; Larosa, Facundo Santiago; Ghignone, Ramiro Adrian; Alvarez, Nicolás; Lutenberg, ArielIcon
Fecha de publicación: 02/2020
Editorial: Institute of Electrical and Electronics Engineers
Revista: IEEE Latin America Transactions
ISSN: 1548-0992
Idioma: Español
Tipo de recurso: Artículo publicado
Clasificación temática:

Resumen

An interlocking is a railway system that automatically controls that changes in routes are safely managed, avoidingtrain crashes and derailments. This article presents an analysis of the state of the art technology used in several commercial interlocking equipment. Based on this analysis, design and implementation of an interlocking system architecture in FPGA technology is proposed. Appropriate techniques are applied to achieve the required level of security. The scalability of the design is also analyzed and conclusions are presented.
Palabras clave: CRITICAL SYSTEMS , FPGA , INTERLOCKING , RAILWAY
 
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info:eu-repo/semantics/restrictedAccess Excepto donde se diga explícitamente, este item se publica bajo la siguiente descripción: Creative Commons Attribution-NonCommercial-ShareAlike 2.5 Unported (CC BY-NC-SA 2.5)
Identificadores
URI: http://hdl.handle.net/11336/168354
URL: https://ieeexplore.ieee.org/document/9085282/
DOI: http://dx.doi.org/10.1109/TLA.2020.9085282
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Citación
Menéndez, Martín Nicolás; Larosa, Facundo Santiago; Ghignone, Ramiro Adrian; Alvarez, Nicolás; Lutenberg, Ariel; FPGA implementation of a critical railway interlocking system; Institute of Electrical and Electronics Engineers; IEEE Latin America Transactions; 18; 2; 2-2020; 288-294
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