Hardware-level Secure Coding
; Castiñeira Moreira, Jorge 
Otros responsables
Fecha
01/2023
Editorial
Institute of Electrical and Electronics Engineers
Revista
IEEE Embedded Systems Letters
Título del libro
Nombre del evento
Fecha del evento
Institución organizadora
ISSN
1943-0663
eISSN
1943-0671
ISBN
Idioma
Inglés
Tipo del evento
Clasificación temática
Palabras clave
BIT ERROR RATE , ENCRYPTION , ENTROPY , GALOIS FIELDS , LSFR , REGISTERS , SECURITY , SYMBOLS , TABLE LOOKUP , TURBO CODES
Resumen
In this letter, a combined encryption and error-control coding scheme based on Turbo Codes (TC) is proposed to enhance the security of the transmission. It relies on Convolutional Encoders that operate over Galois Fields GF(4) and include variable encryption polynomials, whose coefficients are randomly selected every L steps from a set of optimal polynomials. This type of encoder has been studied in previous papers, where a certain correspondence between the randomness of the encoded sequence and the performance of the TC was conjectured. In this work, a scheme with a varying length L is proposed to increase the output randomness and, therefore, the security of the sequence to be transmitted. That is to say, the number of steps L, over which one of the polynomials is iterated, is a random variable. The randomness of the output and the security of the TC are quantified using differential block entropy, showing that it is possible to improve the security of the transmitted data without compromising the corresponding Bit Error Rate (BER).
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