Electrical characteristics of metal-insulator-semiconductor structures with atomic layer deposited Al2 O3, HfO2, and nanolaminates on different silicon substrates

Abstract

In this work, the electrical characteristics of different atomic layer deposited high-permittivity dielectric films (Al2 O3, HfO2, and a nanolaminate of them), with a physical thickness of about 10 nm, are evaluated. An extensive capacitance-voltage and current-voltage characterization at room temperature is carried out on metal-insulator- semiconductor structures fabricated on different p -type and n -type silicon substrates and with Al as metal gate. HfO2 layers are found to exhibit the higher dielectric constant, but they suffer from the largest hysteresis and leakage currents and the lowest breakdown voltages. The nanolaminate stacks, with an intermediate dielectric constant, are found to exhibit more similarities to the Al2 O3 layers, withstanding the largest voltages of all the studied dielectric films. The electrical degradation of the layers is evaluated by means of consecutive current-voltage ramps and with constant voltage stress experiments. Results on n -type Si, with electron injection from the substrate, indicate a dominant negative charge trapping on all the studied layers, leading to a decrease in the leakage current levels. On the other hand, the results on p -type Si, with electron injection from the metal gate, suggest that not only charge trapping but also creation of new traps, particularly under the higher stress voltages, are responsible for the observed degradation.