Implementation of a High-Resolution Symmetric PWM Based on Custom CMOS Delay Lines
; Chierchie, Fernando ; Mandolesi, Pablo Sergio ; Paolini, Eduardo Emilio Otros responsables
Fecha
2019
Editorial
Institute of Electrical and Electronics Engineers
Revista
Título del libro
Nombre del evento
XVIII Workshop on Information Processing and Control
Fecha del evento
2019-09-18
Institución organizadora
Universidad Nacional del Sur
ISSN
eISSN
ISBN
978-987-1648-44-3
Idioma
Inglés
Tipo del evento
Workshop
Clasificación temática
Palabras clave
Resumen
An all-digital high-resolution symmetric pulse-width modulator based on a custom delay integrated circuit is presented. The topology uses two complementary trailing-edge PWMsignals from an FPGA to set the coarse adjustment of the symmetric duty-cycles, and the fine adjustment is provided by digitally-controlled delay lines with adjustable time resolution,implemented in a custom integrated circuit. More than 20 dB of reduction in the total harmonic distortion plus noise (THD+N) was measured with the proposed approach for a 1 kHz signal.
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