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dc.contributor.author
Hamkalo, Jose Luis  
dc.contributor.author
Carballal, Claudio Alberto  
dc.contributor.author
Cernuschi Frias, Bruno  
dc.date.available
2022-10-25T10:46:40Z  
dc.date.issued
2012  
dc.identifier.citation
Capacity misses based dynamic shared cache partitioning for multi-core processors; International Conference Parallel and Distributed Computing and Systems; Las Vegas; Estados Unidos; 2012; 170-176  
dc.identifier.isbn
978-0-88986-951-6  
dc.identifier.uri
http://hdl.handle.net/11336/174698  
dc.description.abstract
A dynamic shared cache partitioning scheme for multi-coreprocessors is presented. Capacity misses produced by therunning processes are continuously evaluated and used toassign the available space in a shared cache memory. Theadministration of the resources gets a reduction of up a 20%in the global miss rate of all the executed processes whencompared to a Capitalist management policy. Also IPC andbandwidth were evaluated. The dynamic management proposedfulfills its objective of managing the shared cachespace for every process while improving the performance.  
dc.format
application/pdf  
dc.language.iso
eng  
dc.publisher
Acta Press  
dc.rights
info:eu-repo/semantics/restrictedAccess  
dc.rights.uri
https://creativecommons.org/licenses/by-nc-sa/2.5/ar/  
dc.subject
Shared Cache  
dc.subject
Multi-Core Processor  
dc.subject
Dynamic Cache Administration  
dc.subject.classification
Hardware y Arquitectura de Computadoras  
dc.subject.classification
Ingeniería Eléctrica, Ingeniería Electrónica e Ingeniería de la Información  
dc.subject.classification
INGENIERÍAS Y TECNOLOGÍAS  
dc.title
Capacity misses based dynamic shared cache partitioning for multi-core processors  
dc.type
info:eu-repo/semantics/publishedVersion  
dc.type
info:eu-repo/semantics/conferenceObject  
dc.type
info:ar-repo/semantics/documento de conferencia  
dc.date.updated
2022-05-12T06:24:47Z  
dc.journal.pagination
170-176  
dc.journal.pais
Canadá  
dc.journal.ciudad
Calgary  
dc.description.fil
Fil: Hamkalo, Jose Luis. Universidad de Buenos Aires. Facultad de Ingeniería. Departamento de Electronica; Argentina  
dc.description.fil
Fil: Carballal, Claudio Alberto. Universidad de Buenos Aires. Facultad de Ingeniería. Departamento de Electronica; Argentina  
dc.description.fil
Fil: Cernuschi Frias, Bruno. Consejo Nacional de Investigaciones Científicas y Técnicas. Oficina de Coordinación Administrativa Saavedra 15. Instituto Argentino de Matemática Alberto Calderón; Argentina  
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/doi/http://dx.doi.org/10.2316/P.2012.789-024  
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/url/https://www.actapress.com/PaperInfo.aspx?paperId=454778  
dc.conicet.rol
Autor  
dc.conicet.rol
Autor  
dc.conicet.rol
Autor  
dc.coverage
Internacional  
dc.type.subtype
Conferencia  
dc.description.nombreEvento
International Conference Parallel and Distributed Computing and Systems  
dc.date.evento
2012-11-12  
dc.description.ciudadEvento
Las Vegas  
dc.description.paisEvento
Estados Unidos  
dc.type.publicacion
Book  
dc.description.institucionOrganizadora
International Association of Science and Technology for Development  
dc.source.libro
Proceedings of the IASTED International Conference Parallel and Distributed Computing and Systems  
dc.date.eventoHasta
2012-11-14  
dc.type
Conferencia  

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