Complexity of Simple, Switched and Skipped Chaotic Maps in Finite Precision

Abstract

In this paper we investigate the degradation of the statistic properties of chaotic maps as consequence of their implementation in a digital media such as Digital Signal Processors (DSP), Field Programmable Gate Arrays (FPGA) or Application-Specific Integrated Circuits (ASIC). In these systems, binary floating- and fixed-point are the numerical representations available. Fixed-point representation is preferred over floating-point when speed, low power and/or small circuit area are necessary. Then, in this paper we compare the degradation of fixed-point binary precision version of chaotic maps with the one obtained by using floating point 754-IEEE standard, to evaluate the feasibility of their FPGA implementation. The specific period that every fixed-point precision produces was investigated in previous reports. Statistical characteristics are also relevant, it has been recently shown that it is convenient to describe the statistical characteristic using both, causal and non-causal quantifiers. In this paper we complement the period analysis by characterizing the behavior of these maps from an statistical point of view using cuantifiers from information theory. Here, rather than reproducing an exact replica of the real system, the aim is to meet certain conditions related to the statistics of systems.