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dc.contributor.author
Garcia Rodriguez, Luciano Andres  
dc.contributor.author
Vinson, Jones  
dc.contributor.author
Oliva, Alejandro Raul  
dc.contributor.author
Escobar, Andres  
dc.contributor.author
Balda, Juan  
dc.date.available
2018-11-13T18:46:13Z  
dc.date.issued
2017-06  
dc.identifier.citation
Garcia Rodriguez, Luciano Andres; Vinson, Jones; Oliva, Alejandro Raul; Escobar, Andres; Balda, Juan; A new SST topology comprising boost three-level AC/DC converters for applications in electric power distribution systems; Institute of Electrical and Electronics Engineers; IEEE Journal of Emerging and Selected Topics in Power Electronics; 5; 2; 6-2017; 735-746  
dc.identifier.issn
2168-6777  
dc.identifier.uri
http://hdl.handle.net/11336/64372  
dc.description.abstract
The growing interest in integrating distributed generation into the existing power distribution grid, the increase in the penetration levels of renewables, as well as the need to achieve a more efficient, reliable, and sustainable grid is leading to the development of new grid-interfaced power converters such as the solid-state transformer (SST). As current and voltage ratings of commercially available power semiconductor devices are normally below power ratings required in distribution systems (e.g., 13.8 kVrms), multiple modules must be connected in cascade configuration at the high-voltage (HV) side to reach higher voltage ratings as well as in parallel at the low-voltage (LV) side to achieve high current levels. A new SST topology consisting of modular boost-based three-level ac-dc converters, medium-frequency transformers with two secondary windings, and four-leg ac-dc converters is presented in this paper. When compared to similar approaches, the proposed topology comprises fewer power conversion stages, lower voltage across the semiconductor devices on the HV side, and lower current flowing through each device on the LV side. These characteristics reduce the number of series-connected modules in the HV side and parallel-connected devices in the LV side. The feasibility of the proposed topology is experimentally validated on a 500 W, 120 Vac/48 Vdc scaled-down prototype.  
dc.format
application/pdf  
dc.language.iso
eng  
dc.publisher
Institute of Electrical and Electronics Engineers  
dc.rights
info:eu-repo/semantics/openAccess  
dc.rights.uri
https://creativecommons.org/licenses/by-nc-sa/2.5/ar/  
dc.subject
Boost-Based Topology  
dc.subject
Four-Leg Dc-Ac Converter  
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Multiwinding Solid-State Transformer (Sst)  
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Three-Level Dc-Ac Converter  
dc.subject.classification
Ingeniería de Sistemas y Comunicaciones  
dc.subject.classification
Ingeniería Eléctrica, Ingeniería Electrónica e Ingeniería de la Información  
dc.subject.classification
INGENIERÍAS Y TECNOLOGÍAS  
dc.title
A new SST topology comprising boost three-level AC/DC converters for applications in electric power distribution systems  
dc.type
info:eu-repo/semantics/article  
dc.type
info:ar-repo/semantics/artículo  
dc.type
info:eu-repo/semantics/publishedVersion  
dc.date.updated
2018-10-22T18:07:01Z  
dc.identifier.eissn
2168-6785  
dc.journal.volume
5  
dc.journal.number
2  
dc.journal.pagination
735-746  
dc.journal.pais
Estados Unidos  
dc.journal.ciudad
Washington  
dc.description.fil
Fil: Garcia Rodriguez, Luciano Andres. University of Arkansas; Estados Unidos  
dc.description.fil
Fil: Vinson, Jones. University of Arkansas; Estados Unidos  
dc.description.fil
Fil: Oliva, Alejandro Raul. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - Bahía Blanca. Instituto de Investigaciones en Ingeniería Eléctrica ; Argentina  
dc.description.fil
Fil: Escobar, Andres. Universidad Tecnologica de Pereira; Colombia  
dc.description.fil
Fil: Balda, Juan. University of Arkansas; Estados Unidos  
dc.journal.title
IEEE Journal of Emerging and Selected Topics in Power Electronics  
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/url/https://ieeexplore.ieee.org/document/7869331  
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/doi/http://dx.doi.org/10.1109/JESTPE.2017.2677523