Artículo
Field-effect transistors engineered via solution-based layer-by-layer nanoarchitectonics
Azzaroni, Omar
; Piccinini, Esteban
; Fenoy, Gonzalo Eduardo
; Marmisollé, Waldemar Alejandro
; Ariga, Katsuhiko
Fecha de publicación:
09/2023
Editorial:
IOP Publishing
Revista:
Nanotechnology
ISSN:
0957-4484
Idioma:
Inglés
Tipo de recurso:
Artículo publicado
Clasificación temática:
Resumen
The layer-by-layer (LbL) technique has been proven to be one of the most versatile approaches in order to fabricate functional nanofilms. The use of simple and inexpensive procedures as well as the possibility to incorporate a very wide range of materials through different interactions have driven its application in a wide range of fields. On the other hand, field-effect transistors (FETs) are certainly among the most important elements in electronics. The ability to modulate the flowing current between a source and a drain electrode via the voltage applied to the gate electrode endow these devices to switch or amplify electronic signals, being vital in all of our everyday electronic devices. In this topical review, we highlight different research efforts to engineer field-effect transistors using the LbL assembly approach. We firstly discuss on the engineering of the channel material of transistors via the LbL technique. Next, the deposition of dielectric materials through this approach is reviewed, allowing the development of high-performance electronic components. Finally, the application of the LbL approach to fabricate FETs-based biosensing devices is also discussed, as well as the improvement of the transistor’s interfacial sensitivity by the engineering of the semiconductor with polyelectrolyte multilayers.
Archivos asociados
Licencia
Identificadores
Colecciones
Articulos(INIFTA)
Articulos de INST.DE INV.FISICOQUIMICAS TEORICAS Y APLIC.
Articulos de INST.DE INV.FISICOQUIMICAS TEORICAS Y APLIC.
Citación
Azzaroni, Omar; Piccinini, Esteban; Fenoy, Gonzalo Eduardo; Marmisollé, Waldemar Alejandro; Ariga, Katsuhiko ; Field-effect transistors engineered via solution-based layer-by-layer nanoarchitectonics; IOP Publishing; Nanotechnology; 34; 47; 9-2023; 1-28
Compartir
Altmétricas