Oversampled filter bank channelizer for cryogenic detectors

Abstract

We present the field-programmable gate array (FPGA) implementation of an oversampled generalized discrete Fourier transform (GDFT) filter bank (FB), optimized for its usage in the readout of cryogenic detectors, such as microwave kinetic inductance detectors. A polyphase structure is derived underlining the efficiency of complex-valued subband processing, raised by a GDFT modulation. For the latter, a fast Fourier algorithm realization may be used, yielding a highly efficient polyphase implementation for arbitrary integer decimation ratios. The FB is tested through a 16-channel GDFT channelizer. The implementation is based on the Xilinx Zynq family of FPGAs and aims to show the data reuse and flexibility offered by the GDFT channelizer structure. General design criteria are summarized for the 16-channel polyphase FB channelizer. The performance in hardware resource usage is also presented, taking into account one of the main objectives of the current physics experiments, aiming to have an extremely large readout format.