A Standard Compliant PMU Design for Balanced Input Signals

Abstract

In this paper, we describe a PhasorMeasurement Unit (PMU) complete system designcompliant with the IEEE Std. C37.118.1a. The esti-mation process is performed in two stages. In the firststage, an efficient filtering of the input signals is madeto reject out-of-band and harmonic interference. Thisis achieved with a linear-phase equiripple FIR filterfor each phase. The second stage uses a modifiedSynchronous Reference Frame Phased-Locked Loop(SRF-PLL) to track amplitude, phase, frequency andrate of change of frequency (ROCOF) of the positive-sequence signal. Using a state-space model, severalmodifications to the standard architecture are pre-sented to cope with the requirements of this applica-tion and to obtain a more robust and efficient system.