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dc.contributor.author
Gil Costa, Graciela Verónica
dc.contributor.author
Molina, Romina Soledad
dc.contributor.author
Petrino, Ricardo
dc.contributor.author
Sosa Paez, Carlos Federico
dc.contributor.author
Printista, Alicia Marcela
dc.contributor.author
Dondo Gazzano, Julio Daniel
dc.contributor.other
Dondo Gazzano, Julio Daniel
dc.contributor.other
Crespo, Maria Liz
dc.contributor.other
Cicuttin, Andres
dc.contributor.other
Rincón Calle, Fernando
dc.date.available
2022-05-16T17:54:13Z
dc.date.issued
2016
dc.identifier.citation
Gil Costa, Graciela Verónica; Molina, Romina Soledad; Petrino, Ricardo; Sosa Paez, Carlos Federico; Printista, Alicia Marcela; et al.; Hardware Acceleration of CBIR System with FPGA-Based Platform; IGI Global; 2016; 138-170
dc.identifier.isbn
9781522502999
dc.identifier.uri
http://hdl.handle.net/11336/157654
dc.description.abstract
Typical applications involving image retrieval processes demand a great amount of computation. The visual content of the images is extracted and represented by means of descriptor vectors of multidimensional characteristics. The image retrieval process consists of two tasks: (1) generation of database and indexing; and (2) the search process. The first task involves the construction of descriptor vectors. Then, an index is built upon the database to speed the search process. The second requires calculating a descriptor vector for the query image and computes the similarity search with the ones stored in the index. In this context, it is relevant to devise new algorithms and different parallel platforms that can reduce execution times. In particular, this work focuses on platforms with FPGAs based SoCs to present and evaluate a two stage system where the index is constructed off-line and the similarity search is executed on-line. Results show that the FPGA is 73% faster than a 2 Quad CPU to compute the descriptor vector of an image when using the Color Layout Descriptor of MPEG-7.
dc.format
application/pdf
dc.language.iso
eng
dc.publisher
IGI Global
dc.rights
info:eu-repo/semantics/restrictedAccess
dc.rights.uri
https://creativecommons.org/licenses/by-nc-sa/2.5/ar/
dc.source
https://www.igi-global.com/gateway/book/145470
dc.subject
CBIR
dc.subject
FPGA
dc.subject
SOC
dc.subject.classification
Otras Ciencias de la Computación e Información
dc.subject.classification
Ciencias de la Computación e Información
dc.subject.classification
CIENCIAS NATURALES Y EXACTAS
dc.title
Hardware Acceleration of CBIR System with FPGA-Based Platform
dc.type
info:eu-repo/semantics/publishedVersion
dc.type
info:eu-repo/semantics/bookPart
dc.type
info:ar-repo/semantics/parte de libro
dc.date.updated
2022-05-12T07:34:05Z
dc.journal.pagination
138-170
dc.journal.pais
Estados Unidos
dc.journal.ciudad
Pensilvania
dc.description.fil
Fil: Gil Costa, Graciela Verónica. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - San Luis; Argentina. Universidad Nacional de San Luis. Facultad de Ciencias Fisico Matematicas y Naturales. Departamento de Informatica; Argentina
dc.description.fil
Fil: Molina, Romina Soledad. Universidad Nacional de San Luis. Facultad de Ciencias Físico Matemáticas y Naturales. Departamento de Física; Argentina
dc.description.fil
Fil: Petrino, Ricardo. Universidad Nacional de San Luis. Facultad de Ciencias Físico Matemáticas y Naturales. Departamento de Física; Argentina
dc.description.fil
Fil: Sosa Paez, Carlos Federico. Universidad Nacional de San Luis. Facultad de Ciencias Físico Matemáticas y Naturales. Departamento de Física; Argentina
dc.description.fil
Fil: Printista, Alicia Marcela. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Conicet - San Luis; Argentina. Universidad Nacional de San Luis. Facultad de Ciencias Fisico Matematicas y Naturales. Departamento de Informatica; Argentina
dc.description.fil
Fil: Dondo Gazzano, Julio Daniel. Universidad de Castilla-La Mancha; España
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/doi/http://dx.doi.org/10.4018/978-1-5225-0299-9.ch007
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/url/https://www.igi-global.com/gateway/chapter/159019
dc.conicet.paginas
306
dc.source.titulo
Field-Programmable Gate Array (FPGA) Technologies for High Performance Instrumentation
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