Artículo
Optimization of lookup schemes for flow-based packet classification on FPGAs
Fecha de publicación:
08/03/2015
Editorial:
Hindawi
Revista:
International Journal on Reconfigurable Computing
ISSN:
1687-7195
e-ISSN:
1687-7209
Idioma:
Inglés
Tipo de recurso:
Artículo publicado
Clasificación temática:
Resumen
Packet classification has become a key processing function to enable future flow-based networking schemes. As network capacity increases and new services are deployed, both high throughput and reconfigurability are required for packet classification architectures. FPGA technology can provide the best trade-off among them. However, to date, lookup stages have been mostly developed as independent schemes from the classification stage, which makes their efficient integration on FPGAs difficult. In this context, we propose a new interpretation of the lookup problem in the general context of packet classification, which enables comparing existing lookup schemes on a common basis. From this analysis, we recognize new opportunities for optimization of lookup schemes and their associated classification schemes on FPGA. In particular, we focus on the most appropriate candidate for future networking needs and propose optimizations for it. To validate our analysis, we provide estimation and implementation results for typical lookup architectures on FPGA and observe their convenience for different lookup and classification cases, demonstrating the benefits of our proposed optimization.
Palabras clave:
DATA NETWORKS
,
PACKET CLASSIFICATION
,
FPGA
,
LOOKUP SCHEMES
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Identificadores
Colecciones
Articulos(CCT - CORDOBA)
Articulos de CTRO.CIENTIFICO TECNOL.CONICET - CORDOBA
Articulos de CTRO.CIENTIFICO TECNOL.CONICET - CORDOBA
Citación
Zerbini, Carlos Albert; Finochietto, Jorge Manuel; Optimization of lookup schemes for flow-based packet classification on FPGAs; Hindawi; International Journal on Reconfigurable Computing; 2015; 8-3-2015; 1-31
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