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dc.contributor.author
Cayssials, Ricardo Luis  
dc.contributor.author
Ferro, Edgardo Carlos  
dc.contributor.author
Urriza, José M.  
dc.contributor.author
Boemo, Eduardo  
dc.date.available
2017-01-24T18:53:45Z  
dc.date.issued
2013-08  
dc.identifier.citation
Cayssials, Ricardo Luis; Ferro, Edgardo Carlos; Urriza, José M.; Boemo, Eduardo; Real-Time Scheduling Architecture for Embedded Systems; Praise Worthy Prize; International Review on Computers and Software; 8; 8; 8-2013; 1843-1853  
dc.identifier.issn
1828-6003  
dc.identifier.uri
http://hdl.handle.net/11336/11834  
dc.description.abstract
Industrial applications require meeting real-time specifications. Real-time systems are implemented using processors in order to execute real-time tasks. Temporal constraints must be supported by real-time operating systems or designing the application based on specific hardware resources. Previous approaches to real-time processors have implemented operating system functions in hardware and consequently they are designed to manage tasks’ periods rather than real-time. They cannot be used in a great deal of applications because they are based on restrictive models. This paper proposes the Hardware Real-Time Scheduling Architecture (HRTSA) that introduces an innovative methodology with which to efficiently manage time, events, priorities and tasks in an embedded hardware implementation. The HRTSA is described and realtime performance is evaluated  
dc.format
application/pdf  
dc.language.iso
eng  
dc.publisher
Praise Worthy Prize  
dc.rights
info:eu-repo/semantics/openAccess  
dc.rights.uri
https://creativecommons.org/licenses/by-nc-sa/2.5/ar/  
dc.subject
Real-Time Scheduling  
dc.subject
Fpga  
dc.subject
Soft-Processor  
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Microporcessor Design  
dc.subject.classification
Otras Ingeniería Eléctrica, Ingeniería Electrónica e Ingeniería de la Información  
dc.subject.classification
Ingeniería Eléctrica, Ingeniería Electrónica e Ingeniería de la Información  
dc.subject.classification
INGENIERÍAS Y TECNOLOGÍAS  
dc.title
Real-Time Scheduling Architecture for Embedded Systems  
dc.type
info:eu-repo/semantics/article  
dc.type
info:ar-repo/semantics/artículo  
dc.type
info:eu-repo/semantics/publishedVersion  
dc.date.updated
2017-01-19T19:53:30Z  
dc.identifier.eissn
1828-6011  
dc.journal.volume
8  
dc.journal.number
8  
dc.journal.pagination
1843-1853  
dc.journal.pais
Reino Unido  
dc.description.fil
Fil: Cayssials, Ricardo Luis. Consejo Nacional de Investigaciones Científicas y Técnicas. Centro Científico Tecnológico Bahía Blanca. Instituto de Investigación en Ingeniería Eléctrica; Argentina. Universidad Nacional del Sur. Departamento de Ingenieria Electrica y de Computadoras; Argentina  
dc.description.fil
Fil: Ferro, Edgardo Carlos. Universidad Nacional del Sur. Departamento de Ingenieria Electrica y de Computadoras; Argentina. Consejo Nacional de Investigaciones Científicas y Técnicas; Argentina  
dc.description.fil
Fil: Urriza, José M.. Universidad Nacional de la Patagonia; Argentina  
dc.description.fil
Fil: Boemo, Eduardo. Universidad Autónoma de Madrid; España  
dc.journal.title
International Review on Computers and Software  
dc.relation.alternativeid
info:eu-repo/semantics/altIdentifier/url/http://www.praiseworthyprize.org/jsm/index.php?journal=irecos&page=article&op=view&path%5B%5D=13396